IBIS Macromodel Task Group Meeting date: 06 Dec 2011 Members (asterisk for those attending): Agilent: * Fangyi Rao * Radek Biernacki Altera: * David Banas Ansys: Samuel Mertens * Dan Dvorscak * Curtis Clark Arrow Electronics: Ian Dodd Cadence Design Systems: Terry Jernberg * Ambrish Varma Celsionix: Kellee Crisafulli Cisco Systems: Ashwin Vasudevan Syed Huq Ericsson: Anders Ekholm IBM: Greg Edlund Intel: Michael Mirmak LSI Logic: Wenyi Jin Mentor Graphics: * John Angulo Zhen Mu * Arpad Muranyi * Vladimir Dmitriev-Zdorov Micron Technology: Randy Wolff NetLogic Microsystems: Ryan Couts Nokia-Siemens Networks: Eckhard Lenski QLogic Corp. James Zhou Sigrity: Brad Brim Kumar Keshavan Ken Willis SiSoft: * Walter Katz Todd Westerhoff Doug Burns * Mike LaBonte Snowbush IP: Marcus Van Ierssel ST Micro: Syed Sadeghi Teraspeed Consulting Group: Scott McMorrow * Bob Ross TI: Casey Morrison Alfred Chong Vitesse Semiconductor: Eric Sweetman Xilinx: Mustansir Fanaswalla The meeting was lead by Arpad Muranyi ------------------------------------------------------------------------ Opens: - Arpad: We can discuss implementation examples requested by Walter - Vladimir has been invited to discuss the jitter BIRD - Also would like to discuss the analog BIRD -------------------------- Call for patent disclosure: - None ------------- Review of ARs: - None - Arpad submit modified Model_types BIRD to Open Forum - Done - Arpad submit BIRD 140.1 with modifications to Open Forum - Done - David write mathematical description of combined Dj proposal - In progress, expected next week - Ambrish and Arpad produce examples of 5 corners with Touchstone files in their proposals - Done ------------- New Discussion: Walter showed Arpad's presentation "Implementing Walter's Example using Arpad's Analog BIRDs" - Arpad: I will post a correction to this based on Walter's feedback - Slide 3: - Walter: My syntax in the top right corner is equivalent to the other side - Why do we need all of the other syntax? - Arpad: My solution improves on analog modeling in regular IBIS - The purpose is to support traditional IBIS as much as possible - Walter: You would need an extended ISS with active elements like PWL, etc. - It is a redundant capability because AMI already has this - Arpad: We can leave the choice up to the group - Radek: Arpad's way is more versatile - Walter: No objection as long as it is not required to do it that way - Arpad: There is a question whether AMI should be involved in analog modeling - Radek: Walter's solution is simple - It requires detailed description for implementation - It ignores what is in the IBIS file, replacing it - It is not true that ISS does not support active elements - ISS has controlled sources and these are active - But ISS is linear and that is what Touchstone can do - It is not a good long term solution - Ken: We should keep circuit modeling in IBIS and algorithmic in AMI - David: Where is port ordering shown in Walter's example? - Walter: BIRD 122 gives a default port order - For other orders there are parameters Walter showed Ambrish's file bird144_example.txt: - Walter: The "s2p"s should be "s4p" - How does the AMI override Vlow and Vhigh? - How are corners chosen in AMI transferred to here? - Ambrish: The tool will support a global notion of "corner" - The parser will check for user-defined corners - Walter: We have a model with 128 corners - Ambrish: The AMI file will need to have those too - Walter: They might be selected by dependency table - The industry is waiting for this capability - Ambrish: Both Arpad and I propose a way to have user defined corners - Ken: Walter's proposal requires hard-coded circuit topology - Walter: At the moment we are talking about choosing Touchstone files - Arpad: Ken's comment is about relying on an assumed topology - Walter: The B element has an assumed topology - Arpad: This is why we added [External Circuit] to add topology flexibility - Walter: IBIS assumes digital input, AMI assumes analog input - Arpad: My approach does not have the same corner issues as Ambrish's - Walter: You are passing Touchstone file name into your example - Ambrish's proposal would not satisfy the industry - Arpad: The question is if we want IBIS or AMI orientation - And whether to enhance legacy IBIS - Ken: Arpad's parameters would be populated from the AMI file? - Arpad: Yes - Ken: The ISS subckt could have anything? - Arpad: Yes - Ambrish: How are threshold parameters passed? Walter showed Arpad's presentation "Implementing Walter's Example using Arpad's Analog BIRDs" - Slide 4: - Arpad: The AMIfile() variable names in IBIS and AMI must match - Fangyi: Where is the subckt used in legacy IBIS? - Arpad: We already have this in SPICE - Fangyi: It has to have the same node names on both sides? - Arpad: No, they are positional - Fangyi: Why are names needed for port ordering? - Ambrish: This overrides the V/T curve? The s-param may not be complex enough - Ken: You can have subckts within subckts - They can have B elements - Arpad: ISS can't have B elements - Fangyi: Can we instantiate 2 subckts in legacy IBIS? - Then I would need 2 port ordering statements - Arpad: No, it can't be done - Walter: Several files would have to be delivered with this - Each will have a .cir file and they better be different - Arpad's scheme works fine if all of this is delivered reliably - Arpad: There would be just one .cir with multiple subckts Walter showed an email explaining derivation methods: - Walter: The model maker knows which jitter components are in the clock_times vector - For statistical analysis the AMI file must have the jitter that would have been modeled by the CDR - David: The reason we have redundant data is because we have different amounts of data for Init and Getwave? - Walter: Yes - Ambrish: We can say it is for statistical purposes - David: We should separate these for Init and Getwave - Ken: We could give add-on values for when there are no clock_times - David: The clock_times could be ideal, so jitter still needed in that case - Fangyi: Why would the model maker not want to put jitter in the CDR? - Walter: The *Clock_Recovery* parameters represent what is modeled by the CDR model - Vendors don't want to put all forms of jitter in the CDR model - Ken: Could we have one set of numbers use based on the return of clock_times - David: It is a matter of having different amounts of jitter - Fangyi: Why do this when not all ISI jitter can be modeled? - Also the jitter can be amplified - Walter: Only near the Nyquist frequency - Ken: It seems this could be simpler - Walter: The industry is doing it this way - David: Maybe we need to know what jitter has been applied to clock_times - We can't assume clock_times are jittered - Ambrish: There could be a possibility of accidentally double-counting jitter - Radek: We should make model makers model jitter - Walter: Rj has tails, and these would not be captured in time domain - David: In Stratix 5 the nominal does not have to be where the tool would predict - But the model doesn't yet have it in clock_times, there are challenges - Demanding all jitter in clock_times would be a problem - Fangyi: They should all be in the clock_times - Walter: Rx_DCD and Tx_DCD will amplify when taken together - It is best to analyze them separately - David: Withdrawing my suggestion that these be separate for Init and Getwave AR: Ken propose reduce set of jitter parameters Meeting ended. ------------- Next meeting: 13 Dec 2011 12:00pm PT Next agenda: 1) Task list item discussions ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives